Conventionally, an error correcting code, such as a Reed-Solomon code, has been used to correct errors on a recording medium, such as a DVD, caused by defects of the medium, or dust or scratches attached on the disk surface.
Recently, in the field of digital video recording, research has been developed toward the next-generation DVDs having higher density and greater capacity than conventional DVDs. In such research, as the density of a recording medium is increased, there is a demand for a reduction in the influence of burst errors due to dust or scratches.
To meet such a demand, a recording method has been proposed in, for example, Kouhei Yamamoto et al., “Error Modeling and Performance Analysis of Error-Correcting Codes for the Digital Video Recording System (Part of the Joint International Symposium on Optical Memory and Optical Data Storage 1999•Koloa, Hawaii•July 1999 SPIE Vol. 3864, pp. 339-341)”. In this method, two error correcting codes are interleaved so as to improve a capability of correcting burst errors.
Another data recording method, in which two or more error correcting codes are interleaved, is disclosed in detail in Japanese Laid-Open Publication No. 2000-40307.
FIG. 9 is a schematic diagram showing a conventional construction of error correcting codes in Yamamoto et al.
As shown in FIG. 9, user data of about 64 Kbytes is divided into 304 columns of 216 bytes each, which are referred to as an information portion. A parity of 32 bytes is added to each information portion to form a first error correcting code 901. The first error correcting code 901 is encoded using Reed-Solomon codes over the finite field GF (256). A component symbol is a minimum element constituting a code and has a length of 1 byte.
The correction capability of the first error correcting code 901 is evaluated as follows.
Generally,d≧2×t+1is established where d represents the minimum distance between each code and t represents the possible number of corrections.
Each first error correcting code 901 contains a 32-byte parity. The minimum distance between two first error correcting codes is 33. Therefore, according to the above-described relationship, the first error correcting code 901 has correction capability of correcting any up to 16 (byte) errors in the code length of 248 (bytes).
In the correction process, when an error position is known, information on the known error position can be used to perform erasure correction. Erasure correction is a method in which when a certain code is subjected to a correction operation and an erroneous component symbol (the minimum unit of a code) is known in advance, the component symbol is assumed to be erased and the erased component symbol is calculated from the remaining component symbols. When error positions are known, the erasure correction can enhance the correction capability by a factor of up to 2.
This can be explained by the following relationship:d≧2×t+e+1,where d represents the minimum distance between each code and t represent the number of corrections, and e represents the number of erasure corrections.
In the case of the first error correcting code 901 where the minimum distance d=33, if all corrections are performed by erasure correction (i.e., t=0), up to 32 (bytes) component symbols can be corrected (e=32).
As shown in FIG. 9, control data of 720 bytes is divided into 24 columns of 30 bytes each, which are referred to as an information portion. A parity of 32 bytes is added to each information portion to form a second error correcting code 902. The second error correcting code 902 is encoded using Reed-Solomon codes over the finite field GF (256). A component symbol is a minimum element constituting a code and has a length of 1 byte. Note that the 720-byte control data contains address information and the like used when the user data is eventually recorded onto an optical disk.
Each second error correcting code 902 also contains a 32-byte parity. The minimum distance between two second error correcting codes 902 is 33 as in the first error correcting code 901. Therefore, the second error correcting code 902 has correction capability of correcting any up to 16 (byte) errors in the code length of 62 (bytes). The number of corrections of the second error correcting code 902 is the same as that of the first error correcting code 901 (16 (bytes)). However, since the second error correcting code 902 has a shorter code length than that of the first error correcting code 901, the correction capability of the second error correcting code 902 is higher than that of the first error correcting code 901.
In this manner, the first error correcting codes 901 and the second error correcting codes 902 are constructed and are then interleaved along with a synchronization signal 903 to generate data streams which are in turn recorded onto a recording medium.
FIG. 10 shows a structure of a data stream in which the conventional first error correcting codes 901 and second error correcting codes 902 shown in FIG. 9 are interleaved along with a synchronization signal under a predetermined interleaving rule.
In FIG. 10, 901a to 901h indicate first error correcting codes, 902a to 902f indicate second error correcting codes, and 903a and 903b are synchronization signals. Component symbols constituting the codes and the synchronization signals are recorded so that they are arranged in a matrix of 312 columns×248 rows and interleaved in the row direction. Each code is encoded in the column direction (vertical direction) and is to be recorded in a row direction (horizontal direction), thereby providing the construction which is robust to burst errors. In the conventional example, a synchronization signal of 1 byte is added per 155 bytes (=38+1+38+1+38+1+38 bytes). The 156 bytes constitute one frame. The data stream has a so-called frame structure. The synchronization signal is used to synchronize data within a frame on a byte-by-byte basis and specify the position of a frame in the entire data stream (data block). The synchronization signal is also used to pull in synchronization at the start of reproduction or perform resynchronization when a bit slip or the like occurs. To this end, the synchronization signal has a pattern, which cannot be generated by demodulation performed when a data stream is finally recorded onto an optical disk, and a predetermined pattern signal comprising a frame number and the like. The reproduction apparatus determines whether or not a pattern reproduced by the reproduction apparatus is identical to a corresponding predetermined pattern which should have been recorded, thereby causing the synchronization signal to function.
As is seen from the data construction of FIG. 10, 38 byte component symbols in each first error correcting code is interposed between a 1 byte synchronization signal and a 1 byte component symbol in a second error correcting code or between 1 byte component symbols in two second error correcting codes. The ratio of the number of columns having a synchronization signal to the number of columns having component symbols of a second error correcting code is 1:3. It is possible to generate erasure flags indicating error position information for erasure correction, depending on whether or not an error is detected in a synchronization signal or component symbols in a second error correcting code, based on the result of synchronization detection of a synchronization signal or the result of error correction using a second error correcting code having correction capability higher than that of the first error correcting codes.
For example, it is assumed that when a second error correcting code is subjected to error correction, an error is detected in component symbols of two consecutive second error correcting codes 902e and 902f (902e-x and 902f-x in FIG. 10) and error correction is actually performed. In this case, a possibility that an error occurs in 38 byte component symbols in the first error correcting code 901g interposed between component symbols of the second error correcting codes 902e-x and 902f-x is considered to be high (i.e., a burst error is assumed to occur). In this case, an erasure flag 905c is generated for the component symbol in the first error correcting code 901g. 
Similarly, for example, for 38 byte component symbols in the first error correcting code 901a interposed between the synchronization signal 903a and component symbols in the second error correcting code 902a, and 38 byte component symbols in the first error correcting code 901d interposed between component symbols in the second error correcting code 902c and the synchronization signal 903b, an error is detected in the result of error correction of the second error correcting code or the result of synchronization detection of whether or not a synchronization signal is detected, and using the result, erasure flags are generated for component symbols in the first error correcting codes 901a and 901d. In FIG. 10, an erasure flag 905a is generated as a result of detection of errors in 903a-x and 902a-x and an erasure flag 905b is generated as a result of detection of errors in 902c-x and 903b-x. 
As described above, erasure flags can be used to perform erasure correction, thereby making it possible to improve correction capability (the number of corrections) by a factor of up to 2. Therefore, an excellent resistance to burst errors due to scratches or dust can be obtained.
In the above-described conventional example, the result of error correction of the second error correcting codes or the result of detection of a synchronization signal is used to generate a corresponding erasure flag.
The error detection using a second error correcting code is different from the error detection using the synchronization signal in terms of capability of detecting errors due to the difference between detection methods. The error detection using a synchronization signal has detection capability much higher than the error detection using a second error correcting code.
In the conventional example, the second error correcting code has correction capability higher than that of the first error correcting code, though the correction capability is as low as 16 (bytes) in 62 (bytes). Therefore, when 17 or more (byte) errors occur in 62 (bytes), it is not possible to correct the errors. In this case, it is not possible to use an erasure flag to specify an error position.
The error detection using a synchronization signal can be performed simply by comparing a reproduced synchronization signal with the synchronization signal before reproduction on a bit-by-bit basis. Even when 17 or more (byte) (e.g., 62 byte) errors occur in a synchronization signal, all of the errors can be detected.
Therefore, in the conventional example, the same first error correcting codes have different reliabilities of error correction depending on the position of the first error correcting code in the data stream, i.e., how the first error correcting code is interleaved with a second error correcting code(s) and/or a synchronization signal(S). Specifically, a first error correcting code interposed between component symbols in two second error correcting codes having lower detection capability is less reliable than another first error correcting code interposed between a synchronization signal and a second error correcting code, due to the error detection capability.
When higher and lower reliabilities coexist, the reliability of the entirety is constrained by the lowest reliability. In the conventional example, it is very likely that an error state, such as incapability of data reproduction, occurs in a first error correcting code interposed between component symbols in two second error correcting codes having lower reliability and low error detection capability.
The present invention is provided to solve the above-described problems. The object of the present invention is to provide a data recording method, a recording medium and a reproduction apparatus whose overall correction capability is improved by removing the difference in error detection reliability depending on the position of the first error correcting code in the data stream, i.e., how first error correcting codes are interleaved with second error correcting codes and synchronization signals, and by which highly reliable reproduction can be performed.